emu: INT instruction, standalone dos function for now
This commit is contained in:
9
src/emu/dos.rs
Normal file
9
src/emu/dos.rs
Normal file
@@ -0,0 +1,9 @@
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use emu::pc::Bus;
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use emu::i8088::i8088;
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pub fn interrupt(cpu: &mut i8088, _bus: &mut Bus) {
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let svc = cpu.a;
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match svc {
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_ => unimplemented!("dos service: {:#02X}\ncpu: {:#X?}", svc, cpu)
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}
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}
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@@ -50,8 +50,9 @@ pub struct Flags {
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}
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mod ops {
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use emu::i8088::{LValue, RValue, segoff_to_addr};
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use emu::byteorder::{ByteOrder, LittleEndian};
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use emu::dos;
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use emu::i8088::{Bus, LValue, RValue, i8088, segoff_to_addr};
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pub fn call(ip: &mut u16, ss: u16, sp: &mut u16, mem: &mut [u8], addr: i16) {
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let target = ip.wrapping_add(addr as u16);
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@@ -59,6 +60,13 @@ mod ops {
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*ip = target;
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}
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pub fn int(cpu: &mut i8088, bus: &mut Bus, num: &u8) {
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match num {
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0x21 => dos::interrupt(cpu, bus),
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_ => unimplemented!("interrupt: {:02X}\ncpu: {:#X?}", num, cpu)
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}
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}
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pub fn mov<T>(dst: &mut impl LValue<T>, src: &impl RValue<T>) {
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dst.write(src.read());
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}
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@@ -130,14 +138,14 @@ impl<'a> RValue<u8> for RegHi<'a> {
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macro_rules! step {
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// Base case: all args processed and ready to call op
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(@code ( $($args:tt)* ),
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$cpu:ident, $bus:ident, $name:ident, $cycles:literal,
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$cpu:expr, $bus:expr, $name:ident, $cycles:literal,
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()) => {
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ops::$name($($args),*);
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};
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// Inductive case: decode next arg to be placed in list
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(@code ( $($args:tt)* ),
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$cpu:ident, $bus:ident, $name:ident, $cycles:literal,
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$cpu:expr, $bus:expr, $name:ident, $cycles:literal,
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($next:ident $(= $nextrhs:ident)? $($rest:ident $(= $restrhs:ident)?)*)) => {
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step!(@$next$(= $nextrhs)?
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( ($($args)*), $cpu, $bus, $name, $cycles, ($($rest $(= $restrhs)?)*) ),
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@@ -145,41 +153,50 @@ macro_rules! step {
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};
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// accept an argument from a decoder and recur to look for next arg
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(@arg ( ($($args:tt)*), $cpu:ident, $bus:ident, $name:ident, $cycles:literal, ( $($rest:tt)* ) ),
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(@arg ( ($($args:tt)*), $cpu:expr, $bus:expr, $name:ident, $cycles:literal, ( $($rest:tt)* ) ),
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$arg:expr) => {
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step!(@code ($($args)* $arg), $cpu, $bus, $name, $cycles, ( $($rest)* ))
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};
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// Argument Decoders
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(@d8 $cookie:tt, $cpu:ident, $bus:ident) => { {
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step!(@arg $cookie, &i8088::next_ip($cpu.cs, &mut $cpu.ip, $bus))
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(@bus $cookie:tt, $cpu:expr, $bus:expr) => { {
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step!(@arg $cookie, $bus)
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} };
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(@d16 $cookie:tt, $cpu:ident, $bus:ident) => { {
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(@cpu $cookie:tt, $cpu:expr, $bus:expr) => { {
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step!(@arg $cookie, $cpu)
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} };
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(@d8 $cookie:tt, $cpu:expr, $bus:expr) => { {
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let d8 = i8088::next_ip($cpu.cs, &mut $cpu.ip, $bus);
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step!(@arg $cookie, &d8)
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} };
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(@d16 $cookie:tt, $cpu:expr, $bus:expr) => { {
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let mut buf = [0; 2];
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buf[0] = i8088::next_ip($cpu.cs, &mut $cpu.ip, $bus);
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buf[1] = i8088::next_ip($cpu.cs, &mut $cpu.ip, $bus);
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step!(@arg $cookie, &LittleEndian::read_u16(&buf))
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} };
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(@mem $cookie:tt, $cpu:ident, $bus:ident) => {
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(@mem $cookie:tt, $cpu:expr, $bus:expr) => {
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step!(@arg $cookie, &mut $bus.ram)
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};
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(@reg=$reg:ident $cookie:tt, $cpu:ident, $bus:ident) => {
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(@reg=$reg:ident $cookie:tt, $cpu:expr, $bus:expr) => {
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step!(@arg $cookie, &mut $cpu.$reg);
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};
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(@reghi=$reg:ident $cookie:tt, $cpu:ident, $bus:ident) => {
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(@reghi=$reg:ident $cookie:tt, $cpu:expr, $bus:expr) => {
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step!(@arg $cookie, &mut RegHi { reg: &mut $cpu.$reg });
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};
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(@regval=$reg:ident $cookie:tt, $cpu:ident, $bus:ident) => {
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(@regval=$reg:ident $cookie:tt, $cpu:expr, $bus:expr) => {
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step!(@arg $cookie, $cpu.$reg);
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};
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(@rel16 $cookie:tt, $cpu:ident, $bus:ident) => { {
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(@rel16 $cookie:tt, $cpu:expr, $bus:expr) => { {
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let mut buf = [0; 2];
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buf[0] = i8088::next_ip($cpu.cs, &mut $cpu.ip, $bus);
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buf[1] = i8088::next_ip($cpu.cs, &mut $cpu.ip, $bus);
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@@ -187,7 +204,7 @@ macro_rules! step {
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} };
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// Entry Point
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(($cpu:ident, $bus:ident) => { $( $code:literal => $name:ident[$($args:ident $(= $argrhs:ident)?),*] / $cycles:literal ),*$(,)? } ) => {
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(($cpu:expr, $bus:expr) => { $( $code:literal => $name:ident[$($args:ident $(= $argrhs:ident)?),*] / $cycles:literal ),*$(,)? } ) => {
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{
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let opcode = i8088::next_ip($cpu.cs, &mut $cpu.ip, $bus);
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match(opcode) {
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@@ -210,6 +227,7 @@ impl i8088 {
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0xB4 => mov[reghi=a, d8] / 4,
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0xBA => mov[reg=d, d16] / 4,
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0xC3 => ret[reg=ip, regval=ss, reg=sp, mem] / 20,
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0xCD => int[cpu, bus, d8] / 71,
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0xE8 => call[reg=ip, regval=ss, reg=sp, mem, rel16] / 23,
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})
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}
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@@ -1,4 +1,5 @@
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extern crate byteorder;
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pub mod pc;
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pub mod dos;
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pub mod i8088;
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pub mod pc;
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