emu: CMC/CLC/STC/CLD/STC instructions. POPF flags differ from Eager
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@@ -35,9 +35,10 @@ pub struct Flags {
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impl Flags {
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pub fn cf(&self) -> bool {
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match self.flag_op {
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FlagOp::Eager => { self.res & 1 << CF_BIT != 0 },
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FlagOp::DEC { cf } => { cf },
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FlagOp::INC { cf } => { cf },
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FlagOp::Eager { cf, .. } => cf,
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FlagOp::DEC { cf } => cf,
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FlagOp::INC { cf } => cf,
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FlagOp::POPF => { self.res & 1 << CF_BIT != 0 },
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FlagOp::ROL { dst, src, rot_mask, .. } => {
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dst & (self.sign_mask >> ((src.wrapping_sub(1)) & rot_mask as u16)) != 0
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},
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@@ -62,49 +63,54 @@ impl Flags {
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None => false
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}
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},
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FlagOp::SUB { cf, .. } => { cf },
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FlagOp::SUB { cf, .. } => cf,
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}
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}
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pub fn pf(&self) -> bool {
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match self.flag_op {
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FlagOp::Eager => { self.res & 1 << PF_BIT != 0 },
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FlagOp::Eager { pf, .. } => pf,
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FlagOp::POPF => { self.res & 1 << PF_BIT != 0 },
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FlagOp::ROL { pf, .. }
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| FlagOp::ROR { pf, .. } => { pf },
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| FlagOp::ROR { pf, .. } => pf,
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_ => { self.res.count_ones() & 1 == 0 },
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}
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}
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pub fn af(&self) -> bool {
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match self.flag_op {
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FlagOp::Eager => { self.res & 1 << AF_BIT != 0 },
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FlagOp::Eager { af, .. } => af,
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FlagOp::POPF => { self.res & 1 << AF_BIT != 0 },
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FlagOp::ROL { af, .. }
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| FlagOp::ROR { af, .. } => { af },
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| FlagOp::ROR { af, .. } => af,
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_ => { false /* XXX: unimplemented! */ },
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}
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}
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pub fn zf(&self) -> bool {
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match self.flag_op {
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FlagOp::Eager => { self.res & 1 << ZF_BIT != 0 },
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FlagOp::Eager { zf, .. } => zf,
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FlagOp::POPF => { self.res & 1 << ZF_BIT != 0 },
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FlagOp::ROL { zf, .. }
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| FlagOp::ROR { zf, .. } => { zf },
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| FlagOp::ROR { zf, .. } => zf,
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_ => { self.res == 0 },
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}
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}
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pub fn sf(&self) -> bool {
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match self.flag_op {
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FlagOp::Eager => { self.res & 1 << SF_BIT != 0 },
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FlagOp::Eager { sf, .. } => sf,
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FlagOp::POPF => { self.res & 1 << SF_BIT != 0 },
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FlagOp::ROL { sf, .. }
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| FlagOp::ROR { sf, .. } => { sf },
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| FlagOp::ROR { sf, .. } => sf,
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_ => { self.res & self.sign_mask != 0 },
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}
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}
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pub fn of(&self) -> bool {
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match self.flag_op {
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FlagOp::Eager => { self.res & 1 << OF_BIT != 0 },
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FlagOp::Eager { of, .. } => of,
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FlagOp::POPF => { self.res & 1 << OF_BIT != 0 },
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FlagOp::DEC { .. } => { self.res == self.sign_mask - 1 },
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FlagOp::INC { .. } => { self.res == self.sign_mask },
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FlagOp::ROL { dst, .. }
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@@ -127,9 +133,10 @@ impl Flags {
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#[derive(Clone, Copy)]
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pub enum FlagOp {
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Eager, // precomputed into result, for e.g. POPF
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Eager { cf: bool, pf: bool, af: bool, zf: bool, sf: bool, of: bool }, // all flags precomputed
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DEC { cf: bool },
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INC { cf: bool },
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POPF, // flags encoded in result
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ROL { dst: u16, src: u16, rot_mask: u16, cf: bool, pf: bool, af: bool, zf: bool, sf: bool },
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ROR { dst: u16, src: u16, rot_mask: u16, cf: bool, pf: bool, af: bool, zf: bool, sf: bool },
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SAR { dst: u16, src: u16, sign_bit: bool },
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@@ -139,7 +146,14 @@ pub enum FlagOp {
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}
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impl Default for FlagOp {
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fn default() -> Self { FlagOp::Eager }
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fn default() -> Self {
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FlagOp::Eager { cf: false,
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pf: false,
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af: false,
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zf: false,
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sf: false,
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of: false }
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}
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}
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impl From<u16> for Flags {
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@@ -149,7 +163,7 @@ impl From<u16> for Flags {
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ie: flags & 1 << IF_BIT != 0,
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df: flags & 1 << DF_BIT != 0,
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flag_op: FlagOp::Eager,
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flag_op: FlagOp::POPF,
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res: flags,
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sign_mask: 0,
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}
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