emu: MOV r/m, imm. Mark MOVs with [addr] as defaulting to data seg

This commit is contained in:
2021-04-03 00:52:02 -07:00
parent a4e5d03e22
commit e1c7370aa2

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@@ -473,25 +473,25 @@ impl i8088 {
0x80: { 0x38 => cmp[flags, modrm8, d8] / "4/23+", }, 0x80: { 0x38 => cmp[flags, modrm8, d8] / "4/23+", },
0x81: { 0x38 => cmp[flags, modrm16, d16] / "4/23+", }, 0x81: { 0x38 => cmp[flags, modrm16, d16] / "4/23+", },
0x83: { 0x38 => cmp[flags, modrm16, d8_as_d16] / "4/23+", }, 0x83: { 0x38 => cmp[flags, modrm16, d8_as_d16] / "4/23+", },
0x88 _ => mov[modrm8, r8] / "2/13+", 0x88 _ => mov[modrm8, r8] / "2/13+", // MOV r/m8, r8
0x89 _ => mov[modrm16, r16] / "2/13+", 0x89 _ => mov[modrm16, r16] / "2/13+", // MOV r/m16, r16
0x8A _ => mov[r8, modrm8] / "2/12+", 0x8A _ => mov[r8, modrm8] / "2/12+", // MOV r8, r/m8
0x8B _ => mov[r16, modrm16] / "2/12+", 0x8B _ => mov[r16, modrm16] / "2/12+", // MOV r16, r/m16
0x8C: { 0x00 => mov[modrm16, reg=es] / "2/13+", 0x8C: { 0x00 => mov[modrm16, reg=es] / "2/13+", // MOV r/m16, es
0x08 => mov[modrm16, reg=cs] / "2/13+", 0x08 => mov[modrm16, reg=cs] / "2/13+", // MOV r/m16, cs
0x10 => mov[modrm16, reg=ss] / "2/13+", 0x10 => mov[modrm16, reg=ss] / "2/13+", // MOV r/m16, ss
0x18 => mov[modrm16, reg=ds] / "2/13+", }, 0x18 => mov[modrm16, reg=ds] / "2/13+", }, // MOV r/m16, ds
0x8D _ => lea[r16, modrm] / "2+", 0x8D _ => lea[r16, modrm] / "2+",
0x8E: { 0x00 => mov[reg=es, modrm16] / "2/12+", 0x8E: { 0x00 => mov[reg=es, modrm16] / "2/12+", // MOV es, r/m16
0x08 => mov[reg=cs, modrm16] / "2/12+", 0x08 => mov[reg=cs, modrm16] / "2/12+", // MOV cs, r/m16
0x10 => mov[reg=ss, modrm16] / "2/12+", 0x10 => mov[reg=ss, modrm16] / "2/12+", // MOV ss, r/m16
0x18 => mov[reg=ds, modrm16] / "2/12+", }, 0x18 => mov[reg=ds, modrm16] / "2/12+", }, // MOV ds, r/m16
0x8F: { 0x00 => pop_modrm[regval=ss, reg=sp, modrm16, convert, bus] / "12/25+" }, // POP r/m16 0x8F: { 0x00 => pop_modrm[regval=ss, reg=sp, modrm16, convert, bus] / "12/25+" }, // POP r/m16
0x90 => nop[] / 3, 0x90 => nop[] / 3,
0xA0 => mov[reglo=a, addr] / 14, 0xA0 => mov[seg=ds, reglo=a, addr] / 14, // MOV al, [addr]
0xA1 => mov[reg=a, addr] / 14, 0xA1 => mov[seg=ds, reg=a, addr] / 14, // MOV ax, [addr]
0xA2 => mov[addr, reglo=a] / 14, 0xA2 => mov[seg=ds, addr, reglo=a] / 14, // MOV [addr], al
0xA3 => mov[addr, reg=a] / 14, 0xA3 => mov[seg=ds, addr, reg=a] / 14, // MOV [addr], ax
0xA4 => movs[form=byte0, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "18/9+17n", 0xA4 => movs[form=byte0, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "18/9+17n",
0xA5 => movs[form=word0, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "26/9+25n", 0xA5 => movs[form=word0, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "26/9+25n",
0xA6 => cmps[form=byte0, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "22/9+22n", 0xA6 => cmps[form=byte0, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "22/9+22n",
@@ -502,23 +502,25 @@ impl i8088 {
0xAD => lods[flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=a] / "16/9+17n", 0xAD => lods[flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=a] / "16/9+17n",
0xAE => scas[flags, bus, rep, reg=c, reg=es, reg=di, reglo=a] / "15/9+15n", 0xAE => scas[flags, bus, rep, reg=c, reg=es, reg=di, reglo=a] / "15/9+15n",
0xAF => scas[flags, bus, rep, reg=c, reg=es, reg=di, reg=a] / "19/9+19n", 0xAF => scas[flags, bus, rep, reg=c, reg=es, reg=di, reg=a] / "19/9+19n",
0xB0 => mov[reglo=a, d8] / 4, 0xB0 => mov[reglo=a, d8] / 4, // MOV al, d8
0xB1 => mov[reglo=c, d8] / 4, 0xB1 => mov[reglo=c, d8] / 4, // MOV cl, d8
0xB2 => mov[reglo=d, d8] / 4, 0xB2 => mov[reglo=d, d8] / 4, // MOV dl, d8
0xB3 => mov[reglo=b, d8] / 4, 0xB3 => mov[reglo=b, d8] / 4, // MOV bl, d8
0xB4 => mov[reghi=a, d8] / 4, 0xB4 => mov[reghi=a, d8] / 4, // MOV ah, d8
0xB5 => mov[reghi=c, d8] / 4, 0xB5 => mov[reghi=c, d8] / 4, // MOV ch, d8
0xB6 => mov[reghi=d, d8] / 4, 0xB6 => mov[reghi=d, d8] / 4, // MOV dh, d8
0xB7 => mov[reghi=b, d8] / 4, 0xB7 => mov[reghi=b, d8] / 4, // MOV bh, d8
0xB8 => mov[reg=a, d16] / 4, 0xB8 => mov[reg=a, d16] / 4, // MOV ax, d16
0xB9 => mov[reg=c, d16] / 4, 0xB9 => mov[reg=c, d16] / 4, // MOV cx, d16
0xBA => mov[reg=d, d16] / 4, 0xBA => mov[reg=d, d16] / 4, // MOV dx, d16
0xBB => mov[reg=b, d16] / 4, 0xBB => mov[reg=b, d16] / 4, // MOV bx, d16
0xBC => mov[reg=sp, d16] / 4, 0xBC => mov[reg=sp, d16] / 4, // MOV sp, d16
0xBD => mov[reg=bp, d16] / 4, 0xBD => mov[reg=bp, d16] / 4, // MOV bp, d16
0xBE => mov[reg=si, d16] / 4, 0xBE => mov[reg=si, d16] / 4, // MOV si, d16
0xBF => mov[reg=di, d16] / 4, 0xBF => mov[reg=di, d16] / 4, // MOV di, d16
0xC3 => pop[bus, regval=ss, reg=sp, reg=ip] / 20, // RET 0xC3 => pop[bus, regval=ss, reg=sp, reg=ip] / 20, // RET
0xC6: { 0x00 => mov[modrm8, d8] / "4/14+" }, // MOV r/m8, d8
0xC7: { 0x00 => mov[modrm16, d16] / "4/14+" }, // MOV r/m16, d16
0xCD => int[cpu, bus, d8] / 71, 0xCD => int[cpu, bus, d8] / 71,
0xD0: { 0x00 => rol[form=byte3, flags, modrm8, const=1u8] / "2/23+", // ROL r/m16, 1 0xD0: { 0x00 => rol[form=byte3, flags, modrm8, const=1u8] / "2/23+", // ROL r/m16, 1
0x08 => ror[form=byte3, flags, modrm8, const=1u8] / "2/23+", // ROR r/m16, 1 0x08 => ror[form=byte3, flags, modrm8, const=1u8] / "2/23+", // ROR r/m16, 1