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emu: terser names for form= directives

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This commit is contained in:
Jared Burce
2021-03-29 00:33:53 -07:00
parent 40fed58ecf
commit f5ab9cfad2
1 changed files with 35 additions and 35 deletions
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70
src/emu/i8088.rs
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@@ -178,30 +178,30 @@ macro_rules! step {
step!(@arg $cookie, &mut $cpu.flags) step!(@arg $cookie, &mut $cpu.flags)
}; };
(@form=nullary_byte $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => { (@form=byte0 $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => {
step!(@form $cookie, form=(u8)); step!(@form $cookie, form=(u8));
}; };
(@form=nullary_word $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => { (@form=byte1 $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => {
step!(@form $cookie, form=(u16));
};
(@form=ternary_byte $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => {
step!(@form $cookie, form=(u8, _, _, _));
};
(@form=ternary_word $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => {
step!(@form $cookie, form=(u16, _, _, _));
};
(@form=unary_byte $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => {
step!(@form $cookie, form=(u8, _)); step!(@form $cookie, form=(u8, _));
}; };
(@form=unary_word $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => { (@form=byte3 $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => {
step!(@form $cookie, form=(u8, _, _, _));
};
(@form=word0 $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => {
step!(@form $cookie, form=(u16));
};
(@form=word1 $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => {
step!(@form $cookie, form=(u16, _)); step!(@form $cookie, form=(u16, _));
}; };
(@form=word3 $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => {
step!(@form $cookie, form=(u16, _, _, _));
};
(@mem $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => { (@mem $cookie:tt, $cpu:expr, $bus:expr, $prefix:tt, $modrm:tt) => {
step!(@arg $cookie, &mut $bus.ram) step!(@arg $cookie, &mut $bus.ram)
}; };
@@ -492,10 +492,10 @@ impl i8088 {
0xA1 => mov[reg=a, addr] / 14, 0xA1 => mov[reg=a, addr] / 14,
0xA2 => mov[addr, reglo=a] / 14, 0xA2 => mov[addr, reglo=a] / 14,
0xA3 => mov[addr, reg=a] / 14, 0xA3 => mov[addr, reg=a] / 14,
0xA4 => movs[form=nullary_byte, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "18/9+17n", 0xA4 => movs[form=byte0, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "18/9+17n",
0xA5 => movs[form=nullary_word, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "26/9+25n", 0xA5 => movs[form=word0, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "26/9+25n",
0xA6 => cmps[form=nullary_byte, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "22/9+22n", 0xA6 => cmps[form=byte0, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "22/9+22n",
0xA7 => cmps[form=nullary_word, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "30/9+30n", 0xA7 => cmps[form=word0, flags, bus, rep, reg=c, seg=ds, seg, reg=si, reg=es, reg=di] / "30/9+30n",
0xAA => stos[flags, bus, rep, reg=c, reg=es, reg=di, reglo=a] / "11/9+10n", 0xAA => stos[flags, bus, rep, reg=c, reg=es, reg=di, reglo=a] / "11/9+10n",
0xAB => stos[flags, bus, rep, reg=c, reg=es, reg=di, reg=a] / "15/9+14n", 0xAB => stos[flags, bus, rep, reg=c, reg=es, reg=di, reg=a] / "15/9+14n",
0xAC => lods[flags, bus, rep, reg=c, seg=ds, seg, reg=si, reglo=a] / "12/9+13n", 0xAC => lods[flags, bus, rep, reg=c, seg=ds, seg, reg=si, reglo=a] / "12/9+13n",
@@ -520,28 +520,28 @@ impl i8088 {
0xBF => mov[reg=di, d16] / 4, 0xBF => mov[reg=di, d16] / 4,
0xC3 => pop[bus, regval=ss, reg=sp, reg=ip] / 20, // RET 0xC3 => pop[bus, regval=ss, reg=sp, reg=ip] / 20, // RET
0xCD => int[cpu, bus, d8] / 71, 0xCD => int[cpu, bus, d8] / 71,
0xD0: { 0x20 => shl[form=ternary_byte, flags, modrm8, const=1u8] / "2/23+", // SHL r/m8, 1 0xD0: { 0x20 => shl[form=byte3, flags, modrm8, const=1u8] / "2/23+", // SHL r/m8, 1
0x28 => shr[form=ternary_byte, flags, modrm8, const=1u8] / "2/23+", // SHR r/m8, 1 0x28 => shr[form=byte3, flags, modrm8, const=1u8] / "2/23+", // SHR r/m8, 1
0x38 => sar[form=ternary_byte, flags, modrm8, const=1u8] / "2/23+" }, // SAR r/m8, 1 0x38 => sar[form=byte3, flags, modrm8, const=1u8] / "2/23+" }, // SAR r/m8, 1
0xD1: { 0x20 => shl[form=ternary_word, flags, modrm16, const=1u16] / "2/23+", // SHL r/m16, 1 0xD1: { 0x20 => shl[form=word3, flags, modrm16, const=1u16] / "2/23+", // SHL r/m16, 1
0x28 => shr[form=ternary_word, flags, modrm16, const=1u16] / "2/23+", // SHR r/m16, 1 0x28 => shr[form=word3, flags, modrm16, const=1u16] / "2/23+", // SHR r/m16, 1
0x38 => sar[form=ternary_word, flags, modrm16, const=1u16] / "2/23+" }, // SAR r/m16, 1 0x38 => sar[form=word3, flags, modrm16, const=1u16] / "2/23+" }, // SAR r/m16, 1
0xD2: { 0x20 => shl[form=ternary_byte, flags, modrm8, reglo=c] / "2/23+", // SHL r/m8, CL 0xD2: { 0x20 => shl[form=byte3, flags, modrm8, reglo=c] / "2/23+", // SHL r/m8, CL
0x28 => shr[form=ternary_byte, flags, modrm8, reglo=c] / "2/23+", // SHR r/m8, CL 0x28 => shr[form=byte3, flags, modrm8, reglo=c] / "2/23+", // SHR r/m8, CL
0x38 => sar[form=ternary_byte, flags, modrm8, reglo=c] / "2/23+" }, // SAR r/m8, CL 0x38 => sar[form=byte3, flags, modrm8, reglo=c] / "2/23+" }, // SAR r/m8, CL
0xD3: { 0x20 => shl[form=ternary_word, flags, modrm16, reglo=c] / "2/23+", // SHL r/m16, CL 0xD3: { 0x20 => shl[form=word3, flags, modrm16, reglo=c] / "2/23+", // SHL r/m16, CL
0x28 => shr[form=ternary_word, flags, modrm16, reglo=c] / "2/23+", // SHR r/m16, CL 0x28 => shr[form=word3, flags, modrm16, reglo=c] / "2/23+", // SHR r/m16, CL
0x38 => sar[form=ternary_word, flags, modrm16, reglo=c] / "2/23+" }, // SAR r/m16, CL 0x38 => sar[form=word3, flags, modrm16, reglo=c] / "2/23+" }, // SAR r/m16, CL
0xE3 => jcxz[reg=ip, reg=c, rel8] / "18/6", // JCXZ rel8 0xE3 => jcxz[reg=ip, reg=c, rel8] / "18/6", // JCXZ rel8
0xE9 => jmp[reg=ip, rel16] / 15, // JMP rel16 0xE9 => jmp[reg=ip, rel16] / 15, // JMP rel16
0xEB => jmp[reg=ip, rel8] / 15, // JMP rel8 0xEB => jmp[reg=ip, rel8] / 15, // JMP rel8
0xE8 => call[reg=ip, bus, regval=ss, reg=sp, rel16] / 23, 0xE8 => call[reg=ip, bus, regval=ss, reg=sp, rel16] / 23,
0xF2 => nop[rep=NotEqual, prefix] / 0, // REPNE/REPNZ 0xF2 => nop[rep=NotEqual, prefix] / 0, // REPNE/REPNZ
0xF3 => nop[rep=Equal, prefix] / 0, // REP/REPE/REPZ 0xF3 => nop[rep=Equal, prefix] / 0, // REP/REPE/REPZ
0xFE: { 0x00 => inc[form=unary_byte, flags, modrm8] / "3/23+", // INC r/m8 0xFE: { 0x00 => inc[form=byte1, flags, modrm8] / "3/23+", // INC r/m8
0x08 => dec[form=unary_byte, flags, modrm8] / "3/23+", }, // DEC r/m8 0x08 => dec[form=byte1, flags, modrm8] / "3/23+", }, // DEC r/m8
0xFF: { 0x00 => inc[form=unary_word, flags, modrm16] / "3/23+", // INC r/m16 0xFF: { 0x00 => inc[form=word1, flags, modrm16] / "3/23+", // INC r/m16
0x08 => dec[form=unary_word, flags, modrm16] / "3/23+", // DEC r/m16 0x08 => dec[form=word1, flags, modrm16] / "3/23+", // DEC r/m16
0x30 => push_modrm[regval=ss, reg=sp, modrm16, convert, bus] / "15/24+" }, 0x30 => push_modrm[regval=ss, reg=sp, modrm16, convert, bus] / "15/24+" },
}, },
modrm: { modrm: {