jrd
8c359d2c70
emu: Use type arguments instead of PhantomData to disambiguate
...
Allows elision of op directive when operands are of unambiguous width
2021-03-24 20:34:08 -07:00
jrd
88166c5a85
emu: remove duplicate @rep arg decoder rule
2021-03-24 01:38:11 -07:00
jrd
017eaf2955
emu: Hack in push/pop support for ModR/M. UNSAFE, and maybe UNSOUND.
2021-03-24 01:12:32 -07:00
jrd
cf9d2dd15d
emu: Pass [LR]Values by value instead of by &mut
...
I think this made sense originally because registers were being passed
as borrows directly out of the cpu struct. Now they have wrappers
around Cell refs, and those wrappers can be passed directly.
2021-03-22 22:21:03 -07:00
jrd
9b0b4efc40
emu: update si in cmps[bw] string loop [bugfix]
2021-03-22 22:19:48 -07:00
jrd
ff7e8a7fb9
emu: INC/DEC opcodes. width={byte,word} argtypes for disambig
...
Also made all LValues also RValues for brevity (so INC/DEC don't have
to bound their destination arguments by both, but this is not required
if it causes problems for some reason down the road).
2021-03-19 00:07:49 -07:00
jrd
c8d6a3312a
emu: near/short JUMP instructions. Use u16+wrapping_add for all rels
2021-03-18 02:16:15 -07:00
jrd
d6e645cae7
emu: use wrapping_add in displacement address as operand can be neg
2021-03-18 01:43:22 -07:00
jrd
73c537183e
emu: Rename "Addr" to "FarPtr"
...
It was a little confusing with the "Address" trait. And FarPtr carries
with it a segment.
2021-03-18 00:38:06 -07:00
jrd
3b746b75ec
emu: PUSH/POP opcodes, reimpl RET as just "POP IP"
...
This also promotes CALL/RET to actually using the bus for
addressing (because it goes through the generic PUSH/POP code), which
is probably more correct anyway.
2021-03-18 00:32:08 -07:00
jrd
dcf96ec5b3
emu: Operand trait over u8/u16, d8_as_d16 argtype
2021-03-17 21:50:02 -07:00
jrd
ae1f3da4b2
emu: UNTESTED string ops, CMP instruction
...
Likely to be a bugfest.
There's a flags macro for now but unclear how useful it will turn out
to be in practice. Flags in particular need testing.
Also disappointing that I couldn't make instructions generic across
u8/u16, especially for ordinary, non-string CMP. Need to look into
this more to see if it can be done with num-traits or some other
trickery.
2021-03-17 21:37:03 -07:00
jrd
04348a816e
emu: Fake opcode ASSERT for testing
2021-03-12 22:19:45 -08:00
jrd
0c55ff9b36
emu: modrm displacement, LEA instruction
2021-03-12 08:01:28 -08:00
jrd
adb7e672d9
emu: accept cycle cost for modrm spec (and ignore for now)
2021-03-12 04:10:15 -08:00
jrd
c372a96b7c
emu: all MOV opcodes (no modrm base/index/displacement modes yet)
2021-03-12 04:02:27 -08:00
jrd
0a4b240974
emu: fix copypasta where write_lo actually did write_hi
2021-03-12 02:54:44 -08:00
jrd
ac7b3b16a1
emu: factor out utils into own module
2021-03-12 02:27:00 -08:00
jrd
27bc36f9d2
emu: factor out operations and operands into own module
2021-03-11 22:55:51 -08:00
jrd
b950a56d26
emu: segment prefix, addr Arg decoder, Addr arg trait, NOP opcode
2021-03-11 05:55:07 -08:00
jrd
71bcec1574
emu: wrap cpu regs in Cell. r16 addr mode.
...
r16 + modrm16 allowed cpu regs to alias. Wrap them in Cell to allow
this. We also create a Reg wrapper when passing regs so that we can
pass as &mut while simultaneously having other references to the same
reg.
2021-03-10 07:16:08 -08:00
jrd
49789c74f9
emu: show/peek debug instructions
2021-03-09 06:42:12 -08:00
jrd
20bfc45dae
emu: modrm16 arg decoder
2021-03-08 06:20:20 -08:00
jrd
3f2c12a83c
emu: machinery for ModRM propegation
2021-03-08 06:17:45 -08:00
jrd
eeaf713470
emu: dos exit service.
...
Just calls process::exit() for now
2021-03-06 23:48:00 -08:00
jrd
e1a6feb6f5
emu: Factor out hi/lo register access
2021-03-06 23:47:56 -08:00
jrd
1e32036bf7
emu: INT instruction, standalone dos function for now
2021-03-06 05:26:40 -08:00
jrd
0f4e52697a
emu: reghi & d8 address modes. make next_ip assoc instead of member
...
next_ip would borrow all of the cpu, now we just need IP and CS.
2021-03-06 04:52:09 -08:00
jrd
b2aa3fd0e0
emu: MOV generic. Drop Reg16 register wrapper type
2021-03-06 04:18:48 -08:00
jrd
be7e926842
emu: dump register file on unimplemented opcode
2021-03-06 02:10:25 -08:00
jrd
fa49d19ae0
emu: arg=rhs parsing. d16, reg, regval argtypes. non-generic MOV.
2021-03-06 01:09:17 -08:00
jrd
5c39f3b5af
emu ops can get multiple args, mem no longer implicit, implement RET
2021-03-06 01:09:07 -08:00
jrd
639e05edac
basic emu skeleton and loop, CALL instruction & rel16 addr mode
2021-03-06 01:08:19 -08:00
jrd
1c15695c4b
Explicitly name window size constant
...
separating out and committing pieces in an old WIP. Don't know what
specifically prompted this change.
2021-02-11 06:33:03 -08:00
jrd
a91ee62190
cleanup warnings/weird code
2021-02-11 01:31:04 -08:00
jrd
ede85ecb5d
bitrot: update for nalgebra deprecations
2021-02-11 01:30:51 -08:00
jrd
82c53bb761
bitrot: update for lang/stdlib deprecations
2021-02-11 01:30:05 -08:00
jrd
9dd48d359c
bitrot: replace bare traits object syntax with dyn traits
2021-02-11 01:30:01 -08:00
jrd
dea54e4883
update bitrotted dep
2021-02-11 01:29:40 -08:00
jrd
bc0e916179
feature(iterator_flatten) is now stable
2021-02-11 01:28:16 -08:00
jrd
5e18d452cb
mouselook
2021-02-11 01:27:49 -08:00
jrd
f40786931e
Return local error type on VR init
2021-02-11 01:26:52 -08:00
jrd
7ac96862eb
remove bitrot, update and set versions of all deps, notably gfx & nalgebra
2021-02-11 01:25:42 -08:00
jrd
493563b7cc
lto/no-unwind in release builds
2016-12-29 10:27:12 -08:00
jrd
b955d7f1b6
update to gfx 0.13
2016-12-26 15:42:03 -08:00
jrd
3a8c0148c8
read rle .EGA files
2016-11-01 04:08:55 -07:00
jrd
ddc135e09a
read lzw .EGA files
2016-11-01 03:41:12 -07:00
jrd
da0d5a26a3
slightly bump up tile anim speed
2016-10-28 00:33:10 -07:00
jrd
9db44c212c
consolidate imports
2016-10-26 22:52:42 -07:00
jrd
f6b0068ec2
haze
2016-10-26 19:42:22 -07:00
jrd